MIPS
MIPS architecture,为Microprocessor without Interlocked Pipeline Stages的缩写,是一种采取精简指令集(RISC)的处理器架构
Assembly language
汇编语言
教学网站
https://chortle.ccsu.edu/AssemblyTutorial/index.html#part8
https://chortle.ccsu.edu/
MIPS architecture,为Microprocessor without Interlocked Pipeline Stages的缩写,是一种采取精简指令集(RISC)的处理器架构
汇编语言
https://chortle.ccsu.edu/AssemblyTutorial/index.html#part8
https://chortle.ccsu.edu/
本文标题:MIPS Assembly Language
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