System Verilog notes

作者: 余明 | 来源:发表于2018-06-28 17:10 被阅读0次

Background: irun.

(1) Passing value while compilation:-define N=2.

Refer to this page:

https://stackoverflow.com/questions/27779959/how-to-pass-value-to-define-n

(2) Passing value while execution:+N=2. Then in initial block, invoke system task:$test$plusargs and $value$plusargs.

Refer to System Verilog Manual.

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